This is the simplest implementation for a regulated 3.3V rail from a 5V or 9V input.
: Validates the module's cryptographic algorithms and physical security. Common Criteria (CC) EAL4+ npct750 datasheet
The datasheet provides a detailed pinout diagram essential for PCB routing. While the specific layout depends on the package (VQFN vs. TSSOP), the primary functional pins include: Power supply and ground. CS# (Chip Select): For SPI communication. MISO/MOSI: Data lines for the SPI bus. PIRQ#: Interrupt request line to signal the host processor. Reset#: Hardware reset input. Security Features & Certifications This is the simplest implementation for a regulated 3
To set the output voltage to any value between 1.25V and 15V, use an external resistor divider. While the specific layout depends on the package (VQFN vs
: Complies with TCG TPM 2.0 Rev 1.38/1.59 and is FIPS 140-2 Level 2 certified for physical security.